A. Technical Field
The present invention relates to the field of battery monitoring integrated circuits. More specifically, the present invention relates to integrated circuits integrating battery pack protection with functions that require communication with the battery such as fuel gauging or external pack voltage, current and temperature monitoring.
B. Background of the Invention
Integrated battery monitor circuits protect against over voltage and under voltage conditions and they maximize battery life between charges, minimize charging times, and improve overall battery life. Batteries for some PDAs, MP3s, Digital Cameras, and Laptops for example have integrated battery monitor circuits designed within them that ensure that the deliverance of reliable power is properly managed. Without these battery monitor integrated circuits even fine-tuned handhelds will exhibit problems, such as over voltage, and under voltage conditions. Incidentally, overcharging is potentially a very dangerous problem. Overcharging is the state of charging a battery beyond its electrical capacity, which can lead to a battery explosion, leakage, or irreversible damage to the battery. It may also cause damage to the charger or device in which the overcharged battery is later used.
Battery monitor integrated circuits offer other key benefits as well, including maximizing battery life between charges, minimizing charging times, and improving battery life. Another aspect of battery monitor integrated circuits is their functioning design to detect and monitor voltage levels in batteries. When certain parameter thresholds are exceeded or dangerous conditions exist, these monitoring circuits react through either an external or internal control mechanism to protect the monitored batteries and correct problems as programmed. Monitoring circuits are known by a variety of names, including battery monitors, battery protection circuits, and battery fuel-gauge circuits and may include battery charging circuits and reset circuits.
Generally, monitoring circuits use either a high side PFET transistor or high side NFET transistors as switches or pass devices. Due to their size and current requirements, the PFETs or NFETs are external to the monitoring circuit, and each topography has inherent benefits and drawbacks.
FIG. 1A is an example of a high side battery charging and discharging system 100 having a monitoring circuit 103. In this example, the switching devices are PMOS transistors 101 and 102 and are referenced to a bulk power source such as PACK+ 107. As mentioned previously, the PMOS switches 101 and 102 are external to the circuit 103 due to their size and current handling requirements.
Generally, the circuit 103 is put in place to monitor two fault conditions: when an excess amount of current is flowing into the positive terminal of the battery 106 and when an excess amount of current is flowing into the negative terminal of the battery 106. The fault conditions may occur as a result of age related degradation of circuitry, a short across the bulk power source, or any number of reasons.
In a fault condition where excess current is flowing into the positive terminal of the battery 106, the circuit 103 is able to detect the excess current by measuring the voltage across the two PMOS switches 101 and 102 and comparing the voltage to a predetermined threshold. If the voltage exceeds the threshold, a charge driver 104 disables PMOS 101. A circuit starting at PACK+ 107, through the two PMOS switches 101 and 102, the battery 106 to PACK− 108 is broken. Furthermore, a parasitic diode within PMOS 101 (not shown) becomes reverse biased and stops all current flow, save for any leakage current, into the positive terminal of the battery 106.
In a fault condition where excess current is flowing into the negative terminal of the battery 106, the circuit 103 is similarly able to detect the excess current by measuring the voltage across the two PMOS switches 101 and 102 and comparing the voltage to a predetermined threshold. A discharge driver 105 disables PMOS 102 and the same circuit described above is broken. Also, a parasitic diode within PMOS 102 becomes reverse biased and all current flow into the negative terminal of the battery 106 is halted.
As mentioned above, the system 100 in FIG. 1A suffers from increased cost due to the use of PMOS transistors as switches. Inherently, PMOS transistors suffer lower carrier mobility and therefore must be 2.8 times larger than a corresponding NMOS transistor in order to have identical current sinking or sourcing capability. As a result, the use of PMOS transistors may add unacceptable cost to a system where cost is a critical parameter.
FIG. 1B shows a battery protection system 120 having an alternate topography to the system 100 shown in FIG. 1A. The system 120 utilizes NMOS transistors 121 and 122 referenced to a bulk power source such as PACK+ 127. In the system 120, a monitoring circuit 123 comprises a discharge driver 124 and a charge driver 125 as shown in the figure and described below. The monitoring circuit 123 is coupled to a battery 126.
The system 120 operates in a very similar fashion to the system 100 in FIG. 1A. If there is excess current flowing into the battery 126, the NMOS 122 is disabled by the charge driver 125. Likewise, if there is an excess current flowing out of the battery 126, the discharge driver 124 disables the NMOS 121.
However, in this topography, the potential of the gates of both NMOS devices 121 and 122 are, in general, higher than or equal to potential PACK+ 127 or the battery 126. It is well known that in order to be driven on, the gate of an NMOS device must be at a higher potential than the source. Therefore, in order to apply a greater voltage such as to turn the devices on, a charge pump 133 is required. A charge pump is an electronic circuit that uses capacitors (not shown) as energy storage elements to form either a higher or lower voltage power source. Typical charge pump circuits are capable of high efficiencies, sometimes as high as 90%-95%, while being topologically simple circuits. Charge pumps use some form of switching device, such as a MOSFET (not shown), to control the connection of voltages to the capacitor. For instance, to generate a higher voltage, a first stage involves the capacitor being coupled across a voltage and charged up. In a second stage, the capacitor is disconnected from the original charging voltage and coupled with a negative terminal which is coupled to the original positive charging voltage. Because the capacitor retains the voltage across it (ignoring leakage effects) the positive terminal voltage is added to the original voltage, effectively doubling the voltage. The pulsing nature of the higher voltage output is typically smoothed by the use of an output capacitor (not shown).
Despite the simple and efficient nature of a charge pump, it has inherent drawbacks. First, the charge pump=s circuit is high voltage and low current, which requires large resistor and high-voltage device area, thereby adding a significant amount of cost. Furthermore, the energy storage elements, generally a capacitor and additional output capacitor, are external to the circuit 123. As a result, unacceptable assembly costs are added and the storage elements are added to the total bill of materials of the end system.
FIG. 1C shows yet another topography of a system 140 for monitoring a battery 146. The system 140 comprises a monitoring circuit 143 and two NFET devices 141 and 142. In this topography, known as low side protection, the source of the NFET 142 is coupled to the low side of the battery 146 and the source of the NFET 141 is coupled to PACK− 149. The drains of the NFETs 141 and 142 are coupled together. Because the sources and drains of both the NFETs 141 and 142 are at a lower potential than their respective gates, no charge pump is needed to drive the NFETS 141 and 142 in order to turn them on and facilitate the flow of current from PACK− 149 to the low side of the battery 146. The system 140 is able to benefit from using less costly NFET devices while avoiding the prohibitive expense of a charge pump and the necessary external energy storage elements.
However, the topography of the system 140 also has an inherent flaw. The monitoring circuit 143 still must communicate with an external control chip or AC adaptor (not shown) through a communication bus 147. During the usage of system 140, NFET 141, 142 or both may be placed in an open condition. As a result, direct connections to digital control signals received through the communication bus 147 may not be correctly referenced to ground. This error may cause false 1s and 0s to be sensed by the circuit 143. Further, under certain conditions, the inherent devices in circuit 143 can provide an alternate connection between signals 149 and 151. This alternate connection is outside of the control of devices 141 and 142; resulting in an undesirable or even hazardous condition for battery 146. To that end, device 143 is typically isolated from the communication bus 147; limiting available functions for integration with a low side protection topology.